Electrical characteristics of memory devices with a high-k HfO2 trapping layer and dual SiO2/Si3 N4 tunneling layer

Electrical characteristics of memory devices with a high-k HfO2 trapping layer and dual SiO2/Si3 N4 tunneling layer

10.1109/TED.2007.904396

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Bibliographic Details
Main Authors: Wang, Y.Q., Hwang, W.S., Zhang, G., Samudra, G., Yeo, Y.-C., Yoo, W.J.
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Article
Published: 2014
Subjects:
Dual tunneling layer (DTL)
Endurance
High-k trapping layer
Program/erase speed
Retention
Online Access:http://scholarbank.nus.edu.sg/handle/10635/82246
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Institution: National University of Singapore

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