Multi-layer high-κ interpoly dielectric for floating gate flash memory devices

Multi-layer high-κ interpoly dielectric for floating gate flash memory devices

10.1016/j.sse.2008.01.010

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Bibliographic Details
Main Authors: Zhang, L., He, W., Chan, D.S.H., Cho, B.J.
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Article
Published: 2014
Subjects:
Barrier structure
Floating gate
High-κ material
Interfacial layer
Interpoly dielectric
Leakage current
Online Access:http://scholarbank.nus.edu.sg/handle/10635/82726
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Institution: National University of Singapore
Description
Summary:10.1016/j.sse.2008.01.010

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