Nanowire FETs for Low Power CMOS Applications Featuring Novel Gate-All-Around Single Metal FUSI Gates with Dual φ m and v T Tune-ability

10.1109/IEDM.2008.4796836

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Bibliographic Details
Main Authors:	Jiang, Y., Liow, T.Y., Singh, N., Tan, L.H., Lo, G.Q., Chan, D.S.H., Kwong, D.L.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Conference or Workshop Item
Published:	2014
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/84000
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-84000
record_format	dspace
spelling	sg-nus-scholar.10635-840002015-01-15T23:41:59Z Nanowire FETs for Low Power CMOS Applications Featuring Novel Gate-All-Around Single Metal FUSI Gates with Dual φ m and v T Tune-ability Jiang, Y. Liow, T.Y. Singh, N. Tan, L.H. Lo, G.Q. Chan, D.S.H. Kwong, D.L. ELECTRICAL & COMPUTER ENGINEERING 10.1109/IEDM.2008.4796836 Technical Digest - International Electron Devices Meeting, IEDM - TDIMD 2014-10-07T04:47:38Z 2014-10-07T04:47:38Z 2008 Conference Paper Jiang, Y.,Liow, T.Y.,Singh, N.,Tan, L.H.,Lo, G.Q.,Chan, D.S.H.,Kwong, D.L. (2008). Nanowire FETs for Low Power CMOS Applications Featuring Novel Gate-All-Around Single Metal FUSI Gates with Dual φ m and v T Tune-ability. Technical Digest - International Electron Devices Meeting, IEDM : -. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/IEDM.2008.4796836" target="_blank">https://doi.org/10.1109/IEDM.2008.4796836</a> 9781424423781 01631918 http://scholarbank.nus.edu.sg/handle/10635/84000 NOT_IN_WOS Scopus
institution	National University of Singapore
building	NUS Library
country	Singapore
collection	ScholarBank@NUS
description	10.1109/IEDM.2008.4796836
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING Jiang, Y. Liow, T.Y. Singh, N. Tan, L.H. Lo, G.Q. Chan, D.S.H. Kwong, D.L.
format	Conference or Workshop Item
author	Jiang, Y. Liow, T.Y. Singh, N. Tan, L.H. Lo, G.Q. Chan, D.S.H. Kwong, D.L.
spellingShingle	Jiang, Y. Liow, T.Y. Singh, N. Tan, L.H. Lo, G.Q. Chan, D.S.H. Kwong, D.L. Nanowire FETs for Low Power CMOS Applications Featuring Novel Gate-All-Around Single Metal FUSI Gates with Dual φ m and v T Tune-ability
author_sort	Jiang, Y.
title	Nanowire FETs for Low Power CMOS Applications Featuring Novel Gate-All-Around Single Metal FUSI Gates with Dual φ m and v T Tune-ability
title_short	Nanowire FETs for Low Power CMOS Applications Featuring Novel Gate-All-Around Single Metal FUSI Gates with Dual φ m and v T Tune-ability
title_full	Nanowire FETs for Low Power CMOS Applications Featuring Novel Gate-All-Around Single Metal FUSI Gates with Dual φ m and v T Tune-ability
title_fullStr	Nanowire FETs for Low Power CMOS Applications Featuring Novel Gate-All-Around Single Metal FUSI Gates with Dual φ m and v T Tune-ability
title_full_unstemmed	Nanowire FETs for Low Power CMOS Applications Featuring Novel Gate-All-Around Single Metal FUSI Gates with Dual φ m and v T Tune-ability
title_sort	nanowire fets for low power cmos applications featuring novel gate-all-around single metal fusi gates with dual φ m and v t tune-ability
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/84000
_version_	1681089538875719680

Nanowire FETs for Low Power CMOS Applications Featuring Novel Gate-All-Around Single Metal FUSI Gates with Dual φ m and v T Tune-ability

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