Modelling of process parameters for 32nm PMOS transistor using Taguchi method

by Elgomati, H.A., Majlis, B.Y., Hamid, A.M.A., Susthitha, P.M., Ahmad, I.
Published 2017

Modelling of process parameters for 32nm PMOS transistor using Taguchi method

by Elgomati H.A., Majlis B.Y., Hamid A.M.A., Susthitha P.M., Ahmad I.
Published 2023

Optimization of process parameter variation in 45nm p-channel MOSFET using L18 orthogonal array

by Salehuddin, F., Ahmad, I., Hamid, F.A., Zaharim, A., Hamid, A.M.A., Menon, P.S., Elgomati, H.A., Majlis, B.Y., Apte, P.R.
Published 2017

Optimization of process parameter variation in 45nm p-channel MOSFET using L18 orthogonal array

by Salehuddin F., Ahmad I., Hamid F.A., Zaharim A., Hamid A.M.A., Menon P.S., Elgomati H.A., Majlis B.Y., Apte P.R.
Published 2023

Optimization of process parameter variations for 16nm DG-FinFET using Response Surface Methodology-Central Composite Design

by Roslan A.F., Salehuddin F., Zain A.S.M., Kaharudin K.E., Ahmad I., Hazura H., Hanim A.R., Idris S.K., Hamid A.M.A.
Published 2023

Optimization of 10nm Bi-GFET Device for higher ION/IOFF ratio using Taguchi Method

by Roslan A.F., Kaharudin K.E., Salehuddin F., Zain A.S.M., Ahmad I., Faizah Z.A.N., Hazura H., Hanim A.R., Idris S.K., Zaiton A.M., Mohamad N.R., Hamid A.M.A.
Published 2023