Metal gate technology for nanoscale transistors - Material selection and process integration issues

by Yeo, Y.-C.
Published 2014

Planar and multiple-gate transistors with silicon-carbon source/drain

by Yeo, Y.-C.
Published 2014

Silicon-carbon source/drain: Selective epitaxy, process integration, and transistor strain engineering

by Yeo, Y.-C.
Published 2014

Technology options for reducing contact resistances in nanoscale metal-oxide-semiconductor field-effect transistors

by Yeo, Y.-C.
Published 2014

Junction technologies for devices with steep subthreshold swing

by Yeo, Y.-C.
Published 2014

Carbon- and tin- Incorporated source/drain stressors for CMOS transistors

by Yeo, Y.-C.
Published 2014

Strain engineering for hole mobility enhancement in P-channel field-effect transistors

by Yeo, Y.-C.
Published 2014

Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions

by Yeo, Y.-C.
Published 2014

Realizing steep subthreshold swing with impact ionization transistors

by Yeo, Y.-C.
Published 2014

Advanced channel and contact technologies for future CMOS devices

by Yeo, Y.-C.
Published 2014

Advanced source/drain engineering for MOSFETs: Schottky barrier height tuning for contact resistance reduction

by Yeo, Y.-C.
Published 2014

Advanced source/drain technologies for parasitic resistance reduction

by Yeo, Y.-C.
Published 2014

Towards ultimate CMOS performance with new stressor materials

by Yeo, Y.-C.
Published 2014

CMOS devices - Silicon-on-insulator and multi-gate devices

by Yeo, Y.-C.
Published 2014

Embedded Metal Source/Drain (eMSD) for series resistance reduction in In 0.53Ga 0.47As N-channel Ultra-Thin Body Field-Effect Transistor (UTB-FET)

by Subramanian, S., Ivana, Yeo, Y.-C.
Published 2014

Two-bit multi-level phase change random access memory with a triple phase change material stack structure

by Gyanathan, A., Yeo, Y.-C.
Published 2014

Strained silicon substrate technologies for enhancement of transistor performance

by Mei, P., Yeo, Y.-C.
Published 2016

Phase-change random access memory with multilevel resistances implemented using a dual phase-change material stack

by Gyanathan, A., Yeo, Y.-C.
Published 2014

Novel multi-level PCRAM cell with Ta2O5 barrier layer in between a graded Ge2Sb2Te5 stack

by Gyanathan, A., Yeo, Y.-C.
Published 2014

Multi-level phase change memory devices with Ge 2Sb 2Te 5 layers separated by a thermal insulating Ta 2O 5 barrier layer

by Gyanathan, A., Yeo, Y.-C.
Published 2014