Hardware Comparison of Schedulers for Modular Optical Interconnection Networks
We present the first FPGA implementation of the Two-Step Scheduler framework for modular optical interconnection networks. The longest-queue-first scheduling algorithm guarantees the lowest latency, while the iSLIP algorithm minimizes the hardware resources and scheduling duration.
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Main Authors: | Borromeo, J C, Cerutti, Isabella, Castoldi, Piero, Reyes, Rosula SJ, Andriolli, Nicola |
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格式: | text |
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Archīum Ateneo
2019
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在線閱讀: | https://archium.ateneo.edu/ecce-faculty-pubs/32 https://ieeexplore.ieee.org/abstract/document/8818053 |
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機構: | Ateneo De Manila University |
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