Low-power high-speed dual-modulus prescaler for Gb/s applications

• Main Authors: Wang, Keping, Ma, Kaixue, Yeo, Kiat Seng
• Other Authors: School of Electrical and Electronic Engineering
• Format: Conference or Workshop Item
• Language: English
• Published: 2013
• Subjects: DRNTU::Engineering::Electrical and electronic engineering
• Online Access: https://hdl.handle.net/10356/101771; http://hdl.handle.net/10220/16362
• Institution: Nanyang Technological University

This paper present a low-power 10-GHz divide-by-3/4 prescaler for 60-GHz high data rate short range wireless communication systems. Design techniques utilized to optimize the power consumption are addressed. The critical circuit, current-mode-logic (CML) blocks, are optimized to achieve high speed a...