Subthreshold analog/RF performance of underlap DG FETs with asymmetric source/drain extensions

DG FETs with underlap architectures exhibit better performance for logic applications owing to its improved immunity to short channel effects. In this work, we have analyzed the effect of symmetric and asymmetric source drain extensions in the underlap DG FETs for improved subthreshold analog and RF...

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Main Authors: Koley, Kalyan, Syamal, Binit, Kundu, Atanu, Mohankumar, N., Sarkar, C.K.
Other Authors: School of Electrical and Electronic Engineering
Format: Article
Language:English
Published: 2013
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Online Access:https://hdl.handle.net/10356/102463
http://hdl.handle.net/10220/11279
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-1024632020-03-07T14:00:33Z Subthreshold analog/RF performance of underlap DG FETs with asymmetric source/drain extensions Koley, Kalyan Syamal, Binit Kundu, Atanu Mohankumar, N. Sarkar, C.K. School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Microelectronics DG FETs with underlap architectures exhibit better performance for logic applications owing to its improved immunity to short channel effects. In this work, we have analyzed the effect of symmetric and asymmetric source drain extensions in the underlap DG FETs for improved subthreshold analog and RF performance in the 45 nm gate length regime. The various figures of merits such as transconductance, transconductance generation factor and intrinsic gain along with cut-off frequency, maximum frequency of oscillation and gain–bandwidth product are investigated for symmetric and asymmetric drain extensions in the underlapped DG FETs. The underlap length of the asymmetric DG FETs is also varied for improved device performance parameters. For circuit analysis, a cascode amplifier is analyzed for higher gain by biasing the load transistor with the special importance in the subthreshold regime as CMOS circuits operated in this regime are very much attractive for ultralow-power high gain performances. For AC analysis, the gain–frequency curve of a common source amplifier is studied for the improved gain–bandwidth product and an improvement of about 55% was observed in the asymmetric DG underlap devices compared to its symmetric counterpart. 2013-07-12T03:05:19Z 2019-12-06T20:55:23Z 2013-07-12T03:05:19Z 2019-12-06T20:55:23Z 2012 2012 Journal Article https://hdl.handle.net/10356/102463 http://hdl.handle.net/10220/11279 10.1016/j.microrel.2012.06.110 en Microelectronics reliability © 2012 Elsevier Ltd.
institution Nanyang Technological University
building NTU Library
country Singapore
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering::Microelectronics
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Microelectronics
Koley, Kalyan
Syamal, Binit
Kundu, Atanu
Mohankumar, N.
Sarkar, C.K.
Subthreshold analog/RF performance of underlap DG FETs with asymmetric source/drain extensions
description DG FETs with underlap architectures exhibit better performance for logic applications owing to its improved immunity to short channel effects. In this work, we have analyzed the effect of symmetric and asymmetric source drain extensions in the underlap DG FETs for improved subthreshold analog and RF performance in the 45 nm gate length regime. The various figures of merits such as transconductance, transconductance generation factor and intrinsic gain along with cut-off frequency, maximum frequency of oscillation and gain–bandwidth product are investigated for symmetric and asymmetric drain extensions in the underlapped DG FETs. The underlap length of the asymmetric DG FETs is also varied for improved device performance parameters. For circuit analysis, a cascode amplifier is analyzed for higher gain by biasing the load transistor with the special importance in the subthreshold regime as CMOS circuits operated in this regime are very much attractive for ultralow-power high gain performances. For AC analysis, the gain–frequency curve of a common source amplifier is studied for the improved gain–bandwidth product and an improvement of about 55% was observed in the asymmetric DG underlap devices compared to its symmetric counterpart.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Koley, Kalyan
Syamal, Binit
Kundu, Atanu
Mohankumar, N.
Sarkar, C.K.
format Article
author Koley, Kalyan
Syamal, Binit
Kundu, Atanu
Mohankumar, N.
Sarkar, C.K.
author_sort Koley, Kalyan
title Subthreshold analog/RF performance of underlap DG FETs with asymmetric source/drain extensions
title_short Subthreshold analog/RF performance of underlap DG FETs with asymmetric source/drain extensions
title_full Subthreshold analog/RF performance of underlap DG FETs with asymmetric source/drain extensions
title_fullStr Subthreshold analog/RF performance of underlap DG FETs with asymmetric source/drain extensions
title_full_unstemmed Subthreshold analog/RF performance of underlap DG FETs with asymmetric source/drain extensions
title_sort subthreshold analog/rf performance of underlap dg fets with asymmetric source/drain extensions
publishDate 2013
url https://hdl.handle.net/10356/102463
http://hdl.handle.net/10220/11279
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