Subthreshold analog/RF performance of underlap DG FETs with asymmetric source/drain extensions

• Main Authors: Koley, Kalyan, Syamal, Binit, Kundu, Atanu, Mohankumar, N., Sarkar, C.K.
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Article
• 語言: English
• 出版: 2013
• 主題: DRNTU::Engineering::Electrical and electronic engineering::Microelectronics
• 在線閱讀: https://hdl.handle.net/10356/102463; http://hdl.handle.net/10220/11279
• 機構: Nanyang Technological University

DG FETs with underlap architectures exhibit better performance for logic applications owing to its improved immunity to short channel effects. In this work, we have analyzed the effect of symmetric and asymmetric source drain extensions in the underlap DG FETs for improved subthreshold analog and RF...