Dielectric quality of 3D capacitor embedded in through-silicon via (TSV)

• Main Authors: Lin, Ye, Tan, Chuan Seng
• Other Authors: School of Electrical and Electronic Engineering
• Format: Conference or Workshop Item
• Language: English
• Published: 2020
• Subjects: Engineering::Electrical and electronic engineering::Semiconductors; 3D IC; TSV
• Online Access: https://hdl.handle.net/10356/142081
• Institution: Nanyang Technological University

The concept of 3D capacitor embedded in TSV has been proposed recently to achieve ultrahigh capacitance density (up to 5,621.8 nF/mm2). This paper aims to investigate the effects of trench sidewall roughness and electrode deposition method on the dielectric quality of the 3D capacitor embedded in TS...