Design of a CMOS current-mode voltage reference with low PVT sensitivity

This dissertation proposes a new PVT-Insensitive current-mode voltage reference utilizing second-order curvature-compensated technique. Implemented in TSMC-40nm process technology, the circuit has achieved a temperature coefficient of 18 ppm/◦C in the TT corner and Monte-Carlo T.C. of 27.33 ppm/◦...

全面介紹

Saved in:
書目詳細資料
主要作者: Lin, Youbo
其他作者: Chan Pak Kwong
格式: Thesis-Master by Coursework
語言:English
出版: Nanyang Technological University 2023
主題:
在線閱讀:https://hdl.handle.net/10356/169096
標簽: 添加標簽
沒有標簽, 成為第一個標記此記錄!
機構: Nanyang Technological University
語言: English