Efficient FPGA-based sparse matrix-vector multiplication with data reuse-aware compression

Efficient FPGA-based sparse matrix-vector multiplication with data reuse-aware compression

Sparse matrix-vector multiplication (SpMV) on FPGAs has gained much attention. The performance of SpMV is mainly determined by the number of multiplications between non-zero matrix elements and the corresponding vector values per cycle. On the one side, the off-chip memory bandwidth limits the numbe...

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書目詳細資料
Main Authors:	Li, Shiqing, Liu, Di, Liu, Weichen
其他作者:	School of Computer Science and Engineering
格式:	Article
語言:	English
出版:	2023
主題:	Engineering::Computer science and engineering Engineering::Computer science and engineering::Hardware SpMV FPGA Data Reuse Throughput
在線閱讀:	https://hdl.handle.net/10356/169152
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!
機構:	Nanyang Technological University
語言:	English

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