Analog circuit layout design based on cadence virtuoso and calibre

Analog circuit layout design based on cadence virtuoso and calibre

This thesis examines the utilization of semiconductor physics in analog circuit design, specifically highlighting amplifier layout design and its related issues. Beginning with essential semiconductor principles, it examines the impacts of doping, carrier transport, and band structure on device effi...

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書目詳細資料
主要作者:	Bai, Jiaming
其他作者:	Tang Xiaohong
格式:	Thesis-Master by Coursework
語言:	English
出版:	Nanyang Technological University 2025
主題:	Engineering Amplifier design Analog layout Parasitic effects Layout-dependent effects Square layout Tap cells
在線閱讀:	https://hdl.handle.net/10356/183066
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!

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