CMOS cells design with cross-coupled latches

This project attempts on integrating cross coupled circuit into two CMOS cells designed with new circuit techniques. Output buffer and current mode sense amplifier are the two circuits of interests. In addition, optimization of area utilization of SRAM cell column and its peripheral circuits is also...

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Main Author: Chee, Piew Yoong.
Other Authors: Liu, Po-ching
Format: Theses and Dissertations
Language:English
Published: 2009
Subjects:
Online Access:http://hdl.handle.net/10356/19803
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Institution: Nanyang Technological University
Language: English
id sg-ntu-dr.10356-19803
record_format dspace
spelling sg-ntu-dr.10356-198032023-07-04T16:03:20Z CMOS cells design with cross-coupled latches Chee, Piew Yoong. Liu, Po-ching School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits This project attempts on integrating cross coupled circuit into two CMOS cells designed with new circuit techniques. Output buffer and current mode sense amplifier are the two circuits of interests. In addition, optimization of area utilization of SRAM cell column and its peripheral circuits is also investigated. Master of Engineering 2009-12-14T06:38:40Z 2009-12-14T06:38:40Z 1992 1992 Thesis http://hdl.handle.net/10356/19803 en NANYANG TECHNOLOGICAL UNIVERSITY 142 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Chee, Piew Yoong.
CMOS cells design with cross-coupled latches
description This project attempts on integrating cross coupled circuit into two CMOS cells designed with new circuit techniques. Output buffer and current mode sense amplifier are the two circuits of interests. In addition, optimization of area utilization of SRAM cell column and its peripheral circuits is also investigated.
author2 Liu, Po-ching
author_facet Liu, Po-ching
Chee, Piew Yoong.
format Theses and Dissertations
author Chee, Piew Yoong.
author_sort Chee, Piew Yoong.
title CMOS cells design with cross-coupled latches
title_short CMOS cells design with cross-coupled latches
title_full CMOS cells design with cross-coupled latches
title_fullStr CMOS cells design with cross-coupled latches
title_full_unstemmed CMOS cells design with cross-coupled latches
title_sort cmos cells design with cross-coupled latches
publishDate 2009
url http://hdl.handle.net/10356/19803
_version_ 1772828178541182976