Unified AC charge and DC current modeling for very-deep-submicron CMOS technology

Unified AC charge and DC current modeling for very-deep-submicron CMOS technology

A novel approach to formulating unified charge and drain current models for MOSFETs is presented. The charge modeling methodology is based on three regional surface-potential solutions, which describes three operating regions in MOSFETs. The modeling approach is extended to all regions with an expl...

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Main Author: Chiah, Siau Ben
Other Authors: Zhou Xing
Format: Theses and Dissertations
Published: 2008
Subjects:
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Online Access:https://hdl.handle.net/10356/3534
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Institution: Nanyang Technological University
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spelling sg-ntu-dr.10356-35342023-07-04T17:36:13Z Unified AC charge and DC current modeling for very-deep-submicron CMOS technology Chiah, Siau Ben Zhou Xing School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits A novel approach to formulating unified charge and drain current models for MOSFETs is presented. The charge modeling methodology is based on three regional surface-potential solutions, which describes three operating regions in MOSFETs. The modeling approach is extended to all regions with an explicit single-piece unified compact charge model. This is also to ensure charge-neutrality across different regions of operation especially at the flat-band condition. The charge modeling approach requires no modification in formulation to include coupled polycrystalline silicon and quantum-mechanical effects for all regions. The approach has been shown to have the potential to be extended to non-conventional bulk-Si MOSFETs structure such as in strain-Si or hetero-structure MOSFETs. DOCTOR OF PHILOSOPHY (EEE) 2008-09-17T09:31:45Z 2008-09-17T09:31:45Z 2007 2007 Thesis Chiah, S. B. (2007). Unified AC charge and DC current modeling for very-deep-submicron CMOS technology. Doctoral thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/3534 10.32657/10356/3534 Nanyang Technological University application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
topic DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Chiah, Siau Ben
Unified AC charge and DC current modeling for very-deep-submicron CMOS technology
description A novel approach to formulating unified charge and drain current models for MOSFETs is presented. The charge modeling methodology is based on three regional surface-potential solutions, which describes three operating regions in MOSFETs. The modeling approach is extended to all regions with an explicit single-piece unified compact charge model. This is also to ensure charge-neutrality across different regions of operation especially at the flat-band condition. The charge modeling approach requires no modification in formulation to include coupled polycrystalline silicon and quantum-mechanical effects for all regions. The approach has been shown to have the potential to be extended to non-conventional bulk-Si MOSFETs structure such as in strain-Si or hetero-structure MOSFETs.
author2 Zhou Xing
author_facet Zhou Xing
Chiah, Siau Ben
format Theses and Dissertations
author Chiah, Siau Ben
author_sort Chiah, Siau Ben
title Unified AC charge and DC current modeling for very-deep-submicron CMOS technology
title_short Unified AC charge and DC current modeling for very-deep-submicron CMOS technology
title_full Unified AC charge and DC current modeling for very-deep-submicron CMOS technology
title_fullStr Unified AC charge and DC current modeling for very-deep-submicron CMOS technology
title_full_unstemmed Unified AC charge and DC current modeling for very-deep-submicron CMOS technology
title_sort unified ac charge and dc current modeling for very-deep-submicron cmos technology
publishDate 2008
url https://hdl.handle.net/10356/3534
_version_ 1772826262762422272

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