Digital system design with FPGA using verilog HDL
In this final year project (Digital system design with FPGA using Verilog HDL) CORDIC is selected as the digital system to be designed. CORDIC is a simple and yet efficient algorithm for computing the hyperbolic and trigonometric functions, without the need of complex hardware multipliers and div...
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主要作者: | Cho, Shao Ying. |
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其他作者: | Jong Ching Chuen |
格式: | Final Year Project |
語言: | English |
出版: |
2011
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主題: | |
在線閱讀: | http://hdl.handle.net/10356/42749 |
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