Investigation and analysis of 1/f noise in sub-micron NMOS devices

This thesis develops a systematic framework for the flicker noise measurement, characterization and simulation of deep sub-micron MOSFETs. In particular, the low frequency noise in 0.13 micrometer NMOS devices is investigated. The devices used throughout this project have been fabricated according t...

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Main Author:	Hla Myo.
Other Authors:	Yeo, Kiat Seng
Format:	Theses and Dissertations
Published:	2008
Subjects:	DRNTU::Engineering::Electrical and electronic engineering::Semiconductors
Online Access:	http://hdl.handle.net/10356/4363
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Institution:	Nanyang Technological University

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spelling	sg-ntu-dr.10356-43632023-07-04T15:59:26Z Investigation and analysis of 1/f noise in sub-micron NMOS devices Hla Myo. Yeo, Kiat Seng School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Semiconductors This thesis develops a systematic framework for the flicker noise measurement, characterization and simulation of deep sub-micron MOSFETs. In particular, the low frequency noise in 0.13 micrometer NMOS devices is investigated. The devices used throughout this project have been fabricated according to the triple well 0.13 micrometer CMOS technology with different doses of phosphorous: 1x10e13/cm2, 2x10e13/cm2 and 3x10e13/cm2 in Deep-Nwell (secondary body). Master of Science (Consumer Electronics) 2008-09-17T09:50:03Z 2008-09-17T09:50:03Z 2004 2004 Thesis http://hdl.handle.net/10356/4363 Nanyang Technological University application/pdf
institution	Nanyang Technological University
building	NTU Library
continent	Asia
country	Singapore Singapore
content_provider	NTU Library
collection	DR-NTU
topic	DRNTU::Engineering::Electrical and electronic engineering::Semiconductors
spellingShingle	DRNTU::Engineering::Electrical and electronic engineering::Semiconductors Hla Myo. Investigation and analysis of 1/f noise in sub-micron NMOS devices
description	This thesis develops a systematic framework for the flicker noise measurement, characterization and simulation of deep sub-micron MOSFETs. In particular, the low frequency noise in 0.13 micrometer NMOS devices is investigated. The devices used throughout this project have been fabricated according to the triple well 0.13 micrometer CMOS technology with different doses of phosphorous: 1x10e13/cm2, 2x10e13/cm2 and 3x10e13/cm2 in Deep-Nwell (secondary body).
author2	Yeo, Kiat Seng
author_facet	Yeo, Kiat Seng Hla Myo.
format	Theses and Dissertations
author	Hla Myo.
author_sort	Hla Myo.
title	Investigation and analysis of 1/f noise in sub-micron NMOS devices
title_short	Investigation and analysis of 1/f noise in sub-micron NMOS devices
title_full	Investigation and analysis of 1/f noise in sub-micron NMOS devices
title_fullStr	Investigation and analysis of 1/f noise in sub-micron NMOS devices
title_full_unstemmed	Investigation and analysis of 1/f noise in sub-micron NMOS devices
title_sort	investigation and analysis of 1/f noise in sub-micron nmos devices
publishDate	2008
url	http://hdl.handle.net/10356/4363
_version_	1772828769982087168

Investigation and analysis of 1/f noise in sub-micron NMOS devices

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