Characterizations of GaN-based high-electron-mobility-transistors (hemts)
Studies on the characteristics of AlGaN/GaN high-electron-mobility transistor (HEMTs) were performed based on the interest of understanding and evaluation of the device performance. This report will focus on the studies of drain current collapse issue on the GaN based HEMTs under the influence of di...
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Format: | Final Year Project |
Language: | English |
Published: |
2012
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Online Access: | http://hdl.handle.net/10356/47701 |
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Institution: | Nanyang Technological University |
Language: | English |
Summary: | Studies on the characteristics of AlGaN/GaN high-electron-mobility transistor (HEMTs) were performed based on the interest of understanding and evaluation of the device performance. This report will focus on the studies of drain current collapse issue on the GaN based HEMTs under the influence of different temperature, surface passivation layer with the variation of gate-to-drain spacing (LGD) and the effect of drain quiescent-bias (VDS0). To understand the origin of drain current collapse, the
measurements were performed by applying quiescent-bias-stresses (pulse length=200ns; pulse period=1ms) to the AlGaN/GaN HEMTs. The device under test (DUT) will be subjected to 4 sets of temperature, 25oC-100oC in the steps of 25oC. Under the influence of the temperature, the amount of measured current collapse is proportional to the varying temperature, which is about 10% increase in the current collapse as the temperature increased by 25oC, this is mainly due to the limitations of 2DEG mobility and carrier velocity. In the second measurement, the device passivated with bi-layer passivation of aluminum oxide and silicon nitride on the surface effectively reduced the surface leakage current, improved the breakdown voltage and suppressed the current collapse by about 80% through the reduction of the surface states and suppresses the trapping effects. We have also observed that the current collapse does not much vary with the increase of LGD (2um-5um). The increase of current collapse has been realized with the increase of drain quiescent-bias (VDS0). This is mainly due to the increase of buffer related traps in the GaN buffer layer. |
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