Development of a rapid prototyping of FPGA-based digital multiplier
This report is devoted for the implemented of different kinds of multipliers on reconfigurable hardware FPGA using VHDL. The main focuses are on the speed, area of the multiplier and performance comparison. Hardware Multiplication is a basic function often required for system applications such as DS...
Saved in:
Main Author: | Toh, Tong San. |
---|---|
Other Authors: | Gwee Bah Hwee |
Format: | Final Year Project |
Language: | English |
Published: |
2012
|
Subjects: | |
Online Access: | http://hdl.handle.net/10356/50174 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Similar Items
-
FPGA based prototyping of UART block in GNSS transceiver
by: Raju Jipson
Published: (2018) -
Low power low voltage adder cells for digital multiplier
by: Zhang, Mingyan
Published: (2008) -
A digital IP design of ADC interface based on FPGA
by: Zhai, Ke
Published: (2023) -
Design and implementation of a digital system on FPGA
by: Sng, Yeong Kian.
Published: (2009) -
Design of a low-power asynchronous multiplier
by: Lim, Khoon Aun.
Published: (2008)