New architectures of multiplier and inner-product processor for high-speed on-chip serial-link bus

Research activities in bit-serial arithmetic circuits have been saturated in recent years due to the unprecedented throughput demand in today's electronic applications that is difficult to achieve even by the parallel counterparts. In addition, the area advantage of serial architecture is becom...

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Bibliographic Details
Main Author: Meher, Manas Ranjan.
Other Authors: Jong Ching Chuen
Format: Theses and Dissertations
Language:English
Published: 2013
Subjects:
Online Access:http://hdl.handle.net/10356/52489
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Institution: Nanyang Technological University
Language: English
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