Nanoscale characterization of advanced high-κ gate dielectric stacks via scanning tunneling microscopy
Gate leakage is the major driving force for the integration of high-κ dielectric in the silicon-based CMOS technology at sub-45 nm nodes. By virtue of the higher dielectric constant value, high-κ metal oxide provides a physically thicker insulator in suppressing the gate leakage while achieving the...
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Format: | Theses and Dissertations |
Language: | English |
Published: |
2014
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Online Access: | https://hdl.handle.net/10356/61038 |
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Institution: | Nanyang Technological University |
Language: | English |