Analysis of high-dielectric constant gate stack reliability for nanoscale CMOS devices application via scanning tunneling microscopy

• Main Author: Ong, Yi Ching
• Other Authors: Sean Joseph O'Shea
• Format: Theses and Dissertations
• Language: English
• Published: 2009
• Subjects: DRNTU::Engineering::Materials::Microelectronics and semiconductor materials; DRNTU::Engineering::Electrical and electronic engineering::Microelectronics
• Online Access: https://hdl.handle.net/10356/19017
• Institution: Nanyang Technological University

The novelty of this study lies in the application of the scanning tunneling microscopy (STM), to study the electronic properties of the high-k gate stack at nanometre scale. The samples are the HfO2/SiOx and the Sc2O3/La2O3/SiOx gate stacks. Based on tunneling and energy band theory, the polycrysta...