Nanoscale characterization of advanced high-κ gate dielectric stacks via scanning tunneling microscopy

Gate leakage is the major driving force for the integration of high-κ dielectric in the silicon-based CMOS technology at sub-45 nm nodes. By virtue of the higher dielectric constant value, high-κ metal oxide provides a physically thicker insulator in suppressing the gate leakage while achieving the...

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書目詳細資料
主要作者: Yew, Kwang Sing
其他作者: Ang Diing Shenp
格式: Theses and Dissertations
語言:English
出版: 2014
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在線閱讀:https://hdl.handle.net/10356/61038
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機構: Nanyang Technological University
語言: English