All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits

Using simple on-chip monitoring circuits, we precisely characterized the impact of hot carrier injection and bias temperature instability on frequency and phase noise degradation of a 65nm all-digital PLL circuit. Experimental data shows that PLL phase noise degrades with aging even though the outpu...

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Main Authors:	Park, Gyusung, Kim, Minsu, Kim, Chris H., Kim, Bongjin, Reddy, Vijay
Other Authors:	School of Electrical and Electronic Engineering
Format:	Conference or Workshop Item
Language:	English
Published:	2019
Subjects:	DRNTU::Engineering::Electrical and electronic engineering Bias Temperature Instability Hot Carrier Injection
Online Access:	https://hdl.handle.net/10356/90235 http://hdl.handle.net/10220/48505
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Institution:	Nanyang Technological University
Language:	English

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spelling	sg-ntu-dr.10356-902352020-03-07T13:24:46Z All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits Park, Gyusung Kim, Minsu Kim, Chris H. Kim, Bongjin Reddy, Vijay School of Electrical and Electronic Engineering 2018 IEEE International Reliability Physics Symposium (IRPS) DRNTU::Engineering::Electrical and electronic engineering Bias Temperature Instability Hot Carrier Injection Using simple on-chip monitoring circuits, we precisely characterized the impact of hot carrier injection and bias temperature instability on frequency and phase noise degradation of a 65nm all-digital PLL circuit. Experimental data shows that PLL phase noise degrades with aging even though the output frequency is maintained constant due to the PLL feedback operation. Results show that applying high temperature annealing can recover most of the phase noise degradation. Accepted version 2019-05-31T03:07:49Z 2019-12-06T17:43:43Z 2019-05-31T03:07:49Z 2019-12-06T17:43:43Z 2018 Conference Paper Park, G., Kim, M., Kim, C. H., Kim, B., & Reddy, V. (2018). All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits. 2018 IEEE International Reliability Physics Symposium (IRPS), 5C.21-5C.26. doi:10.1109/IRPS.2018.8353613 https://hdl.handle.net/10356/90235 http://hdl.handle.net/10220/48505 10.1109/IRPS.2018.8353613 en © 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/IRPS.2018.8353613 6 p. application/pdf
institution	Nanyang Technological University
building	NTU Library
country	Singapore
collection	DR-NTU
language	English
topic	DRNTU::Engineering::Electrical and electronic engineering Bias Temperature Instability Hot Carrier Injection
spellingShingle	DRNTU::Engineering::Electrical and electronic engineering Bias Temperature Instability Hot Carrier Injection Park, Gyusung Kim, Minsu Kim, Chris H. Kim, Bongjin Reddy, Vijay All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits
description	Using simple on-chip monitoring circuits, we precisely characterized the impact of hot carrier injection and bias temperature instability on frequency and phase noise degradation of a 65nm all-digital PLL circuit. Experimental data shows that PLL phase noise degrades with aging even though the output frequency is maintained constant due to the PLL feedback operation. Results show that applying high temperature annealing can recover most of the phase noise degradation.
author2	School of Electrical and Electronic Engineering
author_facet	School of Electrical and Electronic Engineering Park, Gyusung Kim, Minsu Kim, Chris H. Kim, Bongjin Reddy, Vijay
format	Conference or Workshop Item
author	Park, Gyusung Kim, Minsu Kim, Chris H. Kim, Bongjin Reddy, Vijay
author_sort	Park, Gyusung
title	All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits
title_short	All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits
title_full	All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits
title_fullStr	All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits
title_full_unstemmed	All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits
title_sort	all-digital pll frequency and phase noise degradation measurements using simple on-chip monitoring circuits
publishDate	2019
url	https://hdl.handle.net/10356/90235 http://hdl.handle.net/10220/48505
_version_	1681040300266487808

All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits

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