All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits
Using simple on-chip monitoring circuits, we precisely characterized the impact of hot carrier injection and bias temperature instability on frequency and phase noise degradation of a 65nm all-digital PLL circuit. Experimental data shows that PLL phase noise degrades with aging even though the outpu...
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Main Authors: | , , , , |
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Other Authors: | |
Format: | Conference or Workshop Item |
Language: | English |
Published: |
2019
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Subjects: | |
Online Access: | https://hdl.handle.net/10356/90235 http://hdl.handle.net/10220/48505 |
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Institution: | Nanyang Technological University |
Language: | English |
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