All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits
Using simple on-chip monitoring circuits, we precisely characterized the impact of hot carrier injection and bias temperature instability on frequency and phase noise degradation of a 65nm all-digital PLL circuit. Experimental data shows that PLL phase noise degrades with aging even though the outpu...
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Main Authors: | , , , , |
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其他作者: | |
格式: | Conference or Workshop Item |
語言: | English |
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2019
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在線閱讀: | https://hdl.handle.net/10356/90235 http://hdl.handle.net/10220/48505 |
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