Demonstration of Schottky barrier NMOS transistors with erbium silicided source/drain and silicon nanowire channel

• Main Authors: Cui, Guangda, Lee, Pooi See, Chi, Dong Zhi, Chin, Yoke King, Hoe, Keat Mun, Tan, Eu Jin, Pey, Kin Leong, Singh, Navab, Lo, Guo-Qiang
• Other Authors: School of Materials Science & Engineering
• Format: Article
• Language: English
• Published: 2012
• Subjects: DRNTU::Engineering::Materials
• Online Access: https://hdl.handle.net/10356/90576; http://hdl.handle.net/10220/8343
• Institution: Nanyang Technological University

We have fabricated silicon nanowire N-MOSFETs using erbium disilicide (ErSi2−x) in a Schottky source/drain back-gated architecture. Although the subthreshold swing (~180 mV/dec) and drain-induced barrier lowering (~500 mV/V) are high due thick BOX as gate oxide, the fabricated Schottky transistors show acceptable drive current ~900 μA/μm and high Ion/Ioff ratio (~105). This is attributed to the improved carrier injection as a result of low Schottky barrier height (Φb) of ErSi2−x/n − Si(~0.3 eV) and the nanometer-sized (~8 nm) Schottky junction. The carrier transport is found to be dominated by the metal–semiconductor interface instead of the channel body speculated from the channel length independent behavior of the devices. Furthermore, the transistors exhibit ambipolar characteristics, which are modeled using thermionic/ thermionic-field emission for positive and thermionic-field emission for negative gate biases.