Allocating power ground vias in 3D ICs for simultaneous power and thermal integrity

• المؤلفون الرئيسيون: Yu, Hao, Ho, Joanna, He, Lei
• مؤلفون آخرون: School of Electrical and Electronic Engineering
• التنسيق: مقال
• اللغة: English
• منشور في: 2012
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering
• الوصول للمادة أونلاين: https://hdl.handle.net/10356/94215; http://hdl.handle.net/10220/8745
• المؤسسة: Nanyang Technological University

The existing work on via allocation in 3D ICs ignores power/ground vias’ ability to simultaneously reduce voltage bounce and remove heat. This paper develops the first in-depth study on the allocation of power/ground vias in 3D ICs with simultaneous consideration of power and thermal...