Allocating power ground vias in 3D ICs for simultaneous power and thermal integrity

• Main Authors: Yu, Hao, Ho, Joanna, He, Lei
• Other Authors: School of Electrical and Electronic Engineering
• Format: Article
• Language: English
• Published: 2012
• Subjects: DRNTU::Engineering::Electrical and electronic engineering
• Online Access: https://hdl.handle.net/10356/94215; http://hdl.handle.net/10220/8745
• Institution: Nanyang Technological University

The existing work on via allocation in 3D ICs ignores power/ground vias’ ability to simultaneously reduce voltage bounce and remove heat. This paper develops the first in-depth study on the allocation of power/ground vias in 3D ICs with simultaneous consideration of power and thermal...