SIMULATION OF COPPER ELECTRODEPOSITION FOR HIGH ASPECT RATIO THROUGH- SILICON VIA APPLICATIONS IN THREE- DIMENSIONAL INTEGRATED CIRCUITS

SIMULATION OF COPPER ELECTRODEPOSITION FOR HIGH ASPECT RATIO THROUGH- SILICON VIA APPLICATIONS IN THREE- DIMENSIONAL INTEGRATED CIRCUITS

Master's

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Bibliographic Details
Main Author: NAGARAJAN RAGHAVAN
Other Authors: SINGAPORE-MIT ALLIANCE
Format: Theses and Dissertations
Published: 2019
Subjects:
Accelerator
Butler Volmer kinetics
Copper electrodeposition
Finite element simulation
Inhibitor
Keyhole
Leveler
Overpotential
Through silicon via (TSV)
3D integrated circuits
Online Access:https://scholarbank.nus.edu.sg/handle/10635/153952
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Institution: National University of Singapore

Internet

https://scholarbank.nus.edu.sg/handle/10635/153952

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