Performance, power, and reliability tradeoffs of STT-RAM cell subject to architecture-level requirement

10.1109/TMAG.2011.2159262

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Main Authors: Li, H., Wang, X., Ong, Z.-L., Wong, W.-F., Zhang, Y., Wang, P., Chen, Y.
Other Authors: COMPUTER SCIENCE
Format: Conference or Workshop Item
Published: 2013
Subjects:
Online Access:http://scholarbank.nus.edu.sg/handle/10635/40264
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Institution: National University of Singapore
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spelling sg-nus-scholar.10635-402642023-10-25T20:25:57Z Performance, power, and reliability tradeoffs of STT-RAM cell subject to architecture-level requirement Li, H. Wang, X. Ong, Z.-L. Wong, W.-F. Zhang, Y. Wang, P. Chen, Y. COMPUTER SCIENCE MRAM nonvolatility spin-torque spintronic 10.1109/TMAG.2011.2159262 IEEE Transactions on Magnetics 47 10 2356-2359 IEMGA 2013-07-04T08:00:20Z 2013-07-04T08:00:20Z 2011 Conference Paper Li, H., Wang, X., Ong, Z.-L., Wong, W.-F., Zhang, Y., Wang, P., Chen, Y. (2011). Performance, power, and reliability tradeoffs of STT-RAM cell subject to architecture-level requirement. IEEE Transactions on Magnetics 47 (10) : 2356-2359. ScholarBank@NUS Repository. https://doi.org/10.1109/TMAG.2011.2159262 00189464 http://scholarbank.nus.edu.sg/handle/10635/40264 000296418200004 Scopus
institution National University of Singapore
building NUS Library
continent Asia
country Singapore
Singapore
content_provider NUS Library
collection ScholarBank@NUS
topic MRAM
nonvolatility
spin-torque
spintronic
spellingShingle MRAM
nonvolatility
spin-torque
spintronic
Li, H.
Wang, X.
Ong, Z.-L.
Wong, W.-F.
Zhang, Y.
Wang, P.
Chen, Y.
Performance, power, and reliability tradeoffs of STT-RAM cell subject to architecture-level requirement
description 10.1109/TMAG.2011.2159262
author2 COMPUTER SCIENCE
author_facet COMPUTER SCIENCE
Li, H.
Wang, X.
Ong, Z.-L.
Wong, W.-F.
Zhang, Y.
Wang, P.
Chen, Y.
format Conference or Workshop Item
author Li, H.
Wang, X.
Ong, Z.-L.
Wong, W.-F.
Zhang, Y.
Wang, P.
Chen, Y.
author_sort Li, H.
title Performance, power, and reliability tradeoffs of STT-RAM cell subject to architecture-level requirement
title_short Performance, power, and reliability tradeoffs of STT-RAM cell subject to architecture-level requirement
title_full Performance, power, and reliability tradeoffs of STT-RAM cell subject to architecture-level requirement
title_fullStr Performance, power, and reliability tradeoffs of STT-RAM cell subject to architecture-level requirement
title_full_unstemmed Performance, power, and reliability tradeoffs of STT-RAM cell subject to architecture-level requirement
title_sort performance, power, and reliability tradeoffs of stt-ram cell subject to architecture-level requirement
publishDate 2013
url http://scholarbank.nus.edu.sg/handle/10635/40264
_version_ 1781411084639404032