STT-RAM cache hierarchy with multiretention MTJ designs

STT-RAM cache hierarchy with multiretention MTJ designs

10.1109/TVLSI.2013.2267754

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Bibliographic Details
Main Authors: Sun, Z., Bi, X., Li, H., Wong, W.-F., Zhu, X.
Other Authors: COMPUTER SCIENCE
Format: Article
Published: 2016
Subjects:
Cache hierarchy
magnetic tunnel junction (MTJ)
retention time
spin-transfer torque random access memory (STT-RAM)
spintronic memristor
switching current.
Online Access:http://scholarbank.nus.edu.sg/handle/10635/124980
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Institution: National University of Singapore

Internet

http://scholarbank.nus.edu.sg/handle/10635/124980

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