STT-RAM cache hierarchy with multiretention MTJ designs
10.1109/TVLSI.2013.2267754
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sg-nus-scholar.10635-1249802024-11-13T03:29:25Z STT-RAM cache hierarchy with multiretention MTJ designs Sun, Z. Bi, X. Li, H. Wong, W.-F. Zhu, X. COMPUTER SCIENCE Cache hierarchy magnetic tunnel junction (MTJ) retention time spin-transfer torque random access memory (STT-RAM) spintronic memristor switching current. 10.1109/TVLSI.2013.2267754 IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 6 1281-1293 IEVSE 2016-06-02T09:25:19Z 2016-06-02T09:25:19Z 2014 Article Sun, Z., Bi, X., Li, H., Wong, W.-F., Zhu, X. (2014). STT-RAM cache hierarchy with multiretention MTJ designs. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (6) : 1281-1293. ScholarBank@NUS Repository. https://doi.org/10.1109/TVLSI.2013.2267754 10638210 http://scholarbank.nus.edu.sg/handle/10635/124980 000337167600008 Scopus |
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Cache hierarchy magnetic tunnel junction (MTJ) retention time spin-transfer torque random access memory (STT-RAM) spintronic memristor switching current. |
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Cache hierarchy magnetic tunnel junction (MTJ) retention time spin-transfer torque random access memory (STT-RAM) spintronic memristor switching current. Sun, Z. Bi, X. Li, H. Wong, W.-F. Zhu, X. STT-RAM cache hierarchy with multiretention MTJ designs |
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10.1109/TVLSI.2013.2267754 |
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COMPUTER SCIENCE |
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COMPUTER SCIENCE Sun, Z. Bi, X. Li, H. Wong, W.-F. Zhu, X. |
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Article |
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Sun, Z. Bi, X. Li, H. Wong, W.-F. Zhu, X. |
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Sun, Z. |
title |
STT-RAM cache hierarchy with multiretention MTJ designs |
title_short |
STT-RAM cache hierarchy with multiretention MTJ designs |
title_full |
STT-RAM cache hierarchy with multiretention MTJ designs |
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STT-RAM cache hierarchy with multiretention MTJ designs |
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STT-RAM cache hierarchy with multiretention MTJ designs |
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stt-ram cache hierarchy with multiretention mtj designs |
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2016 |
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http://scholarbank.nus.edu.sg/handle/10635/124980 |
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