Tunneling Field-Effect Transistors for Low Power Logic: Design, Simulation and Technology Demonstration

Tunneling Field-Effect Transistors for Low Power Logic: Design, Simulation and Technology Demonstration

Ph.D

Saved in:
Bibliographic Details
Main Author: YANG YUE
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Theses and Dissertations
Language:English
Published: 2013
Subjects:
tunneling transistor, simulation, technology demonstration, gate capacitance, germanium-tin TFET, silicon-carbon source TFET
Online Access:http://scholarbank.nus.edu.sg/handle/10635/43761
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: National University of Singapore
Language: English
id sg-nus-scholar.10635-43761
record_format dspace
spelling sg-nus-scholar.10635-437612024-10-26T01:26:25Z Tunneling Field-Effect Transistors for Low Power Logic: Design, Simulation and Technology Demonstration YANG YUE ELECTRICAL & COMPUTER ENGINEERING YEO YEE CHIA HENG CHUN HUAT tunneling transistor, simulation, technology demonstration, gate capacitance, germanium-tin TFET, silicon-carbon source TFET Ph.D DOCTOR OF PHILOSOPHY 2013-09-30T18:01:29Z 2013-09-30T18:01:29Z 2013-05-06 Thesis YANG YUE (2013-05-06). Tunneling Field-Effect Transistors for Low Power Logic: Design, Simulation and Technology Demonstration. ScholarBank@NUS Repository. http://scholarbank.nus.edu.sg/handle/10635/43761 NOT_IN_WOS en
institution National University of Singapore
building NUS Library
continent Asia
country Singapore
Singapore
content_provider NUS Library
collection ScholarBank@NUS
language English
topic tunneling transistor, simulation, technology demonstration, gate capacitance, germanium-tin TFET, silicon-carbon source TFET
spellingShingle tunneling transistor, simulation, technology demonstration, gate capacitance, germanium-tin TFET, silicon-carbon source TFET
YANG YUE
Tunneling Field-Effect Transistors for Low Power Logic: Design, Simulation and Technology Demonstration
description Ph.D
author2 ELECTRICAL & COMPUTER ENGINEERING
author_facet ELECTRICAL & COMPUTER ENGINEERING
YANG YUE
format Theses and Dissertations
author YANG YUE
author_sort YANG YUE
title Tunneling Field-Effect Transistors for Low Power Logic: Design, Simulation and Technology Demonstration
title_short Tunneling Field-Effect Transistors for Low Power Logic: Design, Simulation and Technology Demonstration
title_full Tunneling Field-Effect Transistors for Low Power Logic: Design, Simulation and Technology Demonstration
title_fullStr Tunneling Field-Effect Transistors for Low Power Logic: Design, Simulation and Technology Demonstration
title_full_unstemmed Tunneling Field-Effect Transistors for Low Power Logic: Design, Simulation and Technology Demonstration
title_sort tunneling field-effect transistors for low power logic: design, simulation and technology demonstration
publishDate 2013
url http://scholarbank.nus.edu.sg/handle/10635/43761
_version_ 1821183686947635200

Similar Items