Optimization of flip chip interconnect reliability using a variable compliance interconnect design

10.1109/EPTC.2006.342704

Saved in:

Bibliographic Details
Main Authors:	Tay, A.A.O., Sun, W.
Other Authors:	MECHANICAL ENGINEERING
Format:	Conference or Workshop Item
Published:	2014
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/73725
Tags:	Add Tag No Tags, Be the first to tag this record!
Institution:	National University of Singapore

id	sg-nus-scholar.10635-73725
record_format	dspace
spelling	sg-nus-scholar.10635-737252015-02-20T20:46:48Z Optimization of flip chip interconnect reliability using a variable compliance interconnect design Tay, A.A.O. Sun, W. MECHANICAL ENGINEERING 10.1109/EPTC.2006.342704 Proceedings of the Electronic Packaging Technology Conference, EPTC 133-137 2014-06-19T05:38:37Z 2014-06-19T05:38:37Z 2006 Conference Paper Tay, A.A.O.,Sun, W. (2006). Optimization of flip chip interconnect reliability using a variable compliance interconnect design. Proceedings of the Electronic Packaging Technology Conference, EPTC : 133-137. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/EPTC.2006.342704" target="_blank">https://doi.org/10.1109/EPTC.2006.342704</a> 142440665X http://scholarbank.nus.edu.sg/handle/10635/73725 NOT_IN_WOS Scopus
institution	National University of Singapore
building	NUS Library
country	Singapore
collection	ScholarBank@NUS
description	10.1109/EPTC.2006.342704
author2	MECHANICAL ENGINEERING
author_facet	MECHANICAL ENGINEERING Tay, A.A.O. Sun, W.
format	Conference or Workshop Item
author	Tay, A.A.O. Sun, W.
spellingShingle	Tay, A.A.O. Sun, W. Optimization of flip chip interconnect reliability using a variable compliance interconnect design
author_sort	Tay, A.A.O.
title	Optimization of flip chip interconnect reliability using a variable compliance interconnect design
title_short	Optimization of flip chip interconnect reliability using a variable compliance interconnect design
title_full	Optimization of flip chip interconnect reliability using a variable compliance interconnect design
title_fullStr	Optimization of flip chip interconnect reliability using a variable compliance interconnect design
title_full_unstemmed	Optimization of flip chip interconnect reliability using a variable compliance interconnect design
title_sort	optimization of flip chip interconnect reliability using a variable compliance interconnect design
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/73725
_version_	1681087800093442048

Optimization of flip chip interconnect reliability using a variable compliance interconnect design

Similar Items