Source engineering for tunnel field-effect transistor: Elevated source with vertical silicon-germanium/germanium heterostructure

10.1143/JJAP.50.04DJ07

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Bibliographic Details
Main Authors:	Han, G., Guo, P., Yang, Y., Fan, L., Yee, Y.S., Zhan, C., Yeo, Y.-C.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Article
Published:	2014
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/83038
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-83038
record_format	dspace
spelling	sg-nus-scholar.10635-830382023-10-26T21:56:22Z Source engineering for tunnel field-effect transistor: Elevated source with vertical silicon-germanium/germanium heterostructure Han, G. Guo, P. Yang, Y. Fan, L. Yee, Y.S. Zhan, C. Yeo, Y.-C. ELECTRICAL & COMPUTER ENGINEERING 10.1143/JJAP.50.04DJ07 Japanese Journal of Applied Physics 50 4 PART 2 - 2014-10-07T04:36:32Z 2014-10-07T04:36:32Z 2011-04 Article Han, G., Guo, P., Yang, Y., Fan, L., Yee, Y.S., Zhan, C., Yeo, Y.-C. (2011-04). Source engineering for tunnel field-effect transistor: Elevated source with vertical silicon-germanium/germanium heterostructure. Japanese Journal of Applied Physics 50 (4 PART 2) : -. ScholarBank@NUS Repository. https://doi.org/10.1143/JJAP.50.04DJ07 00214922 http://scholarbank.nus.edu.sg/handle/10635/83038 000289722400125 Scopus
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
description	10.1143/JJAP.50.04DJ07
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING Han, G. Guo, P. Yang, Y. Fan, L. Yee, Y.S. Zhan, C. Yeo, Y.-C.
format	Article
author	Han, G. Guo, P. Yang, Y. Fan, L. Yee, Y.S. Zhan, C. Yeo, Y.-C.
spellingShingle	Han, G. Guo, P. Yang, Y. Fan, L. Yee, Y.S. Zhan, C. Yeo, Y.-C. Source engineering for tunnel field-effect transistor: Elevated source with vertical silicon-germanium/germanium heterostructure
author_sort	Han, G.
title	Source engineering for tunnel field-effect transistor: Elevated source with vertical silicon-germanium/germanium heterostructure
title_short	Source engineering for tunnel field-effect transistor: Elevated source with vertical silicon-germanium/germanium heterostructure
title_full	Source engineering for tunnel field-effect transistor: Elevated source with vertical silicon-germanium/germanium heterostructure
title_fullStr	Source engineering for tunnel field-effect transistor: Elevated source with vertical silicon-germanium/germanium heterostructure
title_full_unstemmed	Source engineering for tunnel field-effect transistor: Elevated source with vertical silicon-germanium/germanium heterostructure
title_sort	source engineering for tunnel field-effect transistor: elevated source with vertical silicon-germanium/germanium heterostructure
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/83038
_version_	1781784283057225728

Source engineering for tunnel field-effect transistor: Elevated source with vertical silicon-germanium/germanium heterostructure

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