P-channel I-MOS transistor featuring silicon nano-wire with multiple-gates, strained Si1-yCy I-region, in situ doped Si 1-yCy source, and sub-5 mV/decade subthreshold swing

10.1109/VTSA.2008.4530781

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Bibliographic Details
Main Authors:	Toh, E.-H., Wang, G.H., Weeks, D., Zhu, M., Bauer, M., Spear, J., Chan, L., Thomas, S.G., Samudra, G., Yeo, Y.-C.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Conference or Workshop Item
Published:	2014
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/84069
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-84069
record_format	dspace
spelling	sg-nus-scholar.10635-840692024-11-11T18:19:28Z P-channel I-MOS transistor featuring silicon nano-wire with multiple-gates, strained Si1-yCy I-region, in situ doped Si 1-yCy source, and sub-5 mV/decade subthreshold swing Toh, E.-H. Wang, G.H. Weeks, D. Zhu, M. Bauer, M. Spear, J. Chan, L. Thomas, S.G. Samudra, G. Yeo, Y.-C. ELECTRICAL & COMPUTER ENGINEERING 10.1109/VTSA.2008.4530781 International Symposium on VLSI Technology, Systems, and Applications, Proceedings 24-25 2014-10-07T04:48:26Z 2014-10-07T04:48:26Z 2008 Conference Paper Toh, E.-H., Wang, G.H., Weeks, D., Zhu, M., Bauer, M., Spear, J., Chan, L., Thomas, S.G., Samudra, G., Yeo, Y.-C. (2008). P-channel I-MOS transistor featuring silicon nano-wire with multiple-gates, strained Si1-yCy I-region, in situ doped Si 1-yCy source, and sub-5 mV/decade subthreshold swing. International Symposium on VLSI Technology, Systems, and Applications, Proceedings : 24-25. ScholarBank@NUS Repository. https://doi.org/10.1109/VTSA.2008.4530781 9781424416158 http://scholarbank.nus.edu.sg/handle/10635/84069 000256564900010 Scopus
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
description	10.1109/VTSA.2008.4530781
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING Toh, E.-H. Wang, G.H. Weeks, D. Zhu, M. Bauer, M. Spear, J. Chan, L. Thomas, S.G. Samudra, G. Yeo, Y.-C.
format	Conference or Workshop Item
author	Toh, E.-H. Wang, G.H. Weeks, D. Zhu, M. Bauer, M. Spear, J. Chan, L. Thomas, S.G. Samudra, G. Yeo, Y.-C.
spellingShingle	Toh, E.-H. Wang, G.H. Weeks, D. Zhu, M. Bauer, M. Spear, J. Chan, L. Thomas, S.G. Samudra, G. Yeo, Y.-C. P-channel I-MOS transistor featuring silicon nano-wire with multiple-gates, strained Si1-yCy I-region, in situ doped Si 1-yCy source, and sub-5 mV/decade subthreshold swing
author_sort	Toh, E.-H.
title	P-channel I-MOS transistor featuring silicon nano-wire with multiple-gates, strained Si1-yCy I-region, in situ doped Si 1-yCy source, and sub-5 mV/decade subthreshold swing
title_short	P-channel I-MOS transistor featuring silicon nano-wire with multiple-gates, strained Si1-yCy I-region, in situ doped Si 1-yCy source, and sub-5 mV/decade subthreshold swing
title_full	P-channel I-MOS transistor featuring silicon nano-wire with multiple-gates, strained Si1-yCy I-region, in situ doped Si 1-yCy source, and sub-5 mV/decade subthreshold swing
title_fullStr	P-channel I-MOS transistor featuring silicon nano-wire with multiple-gates, strained Si1-yCy I-region, in situ doped Si 1-yCy source, and sub-5 mV/decade subthreshold swing
title_full_unstemmed	P-channel I-MOS transistor featuring silicon nano-wire with multiple-gates, strained Si1-yCy I-region, in situ doped Si 1-yCy source, and sub-5 mV/decade subthreshold swing
title_sort	p-channel i-mos transistor featuring silicon nano-wire with multiple-gates, strained si1-ycy i-region, in situ doped si 1-ycy source, and sub-5 mv/decade subthreshold swing
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/84069
_version_	1821196494784430080

P-channel I-MOS transistor featuring silicon nano-wire with multiple-gates, strained Si1-yCy I-region, in situ doped Si 1-yCy source, and sub-5 mV/decade subthreshold swing

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