Strained Si n-FET featuring compliant SiGe Stress Transfer Layer (STL) and Si0.98C0.02 source/drain stressors for performance enhancement

• Main Authors: Wang, G.H., Toh, E.-H., Weeks, D., Landin, T., Spear, J., Tung, C.H., Thomas, S.G., Samudra, G., Yeo, Y.-C.
• Other Authors: ELECTRICAL & COMPUTER ENGINEERING
• Format: Conference or Workshop Item
• Published: 2014
• Online Access: http://scholarbank.nus.edu.sg/handle/10635/84234
• Institution: National University of Singapore

10.1109/ISDRS.2007.4422229