A 0.5 V 8-12 bit 300 KSPS SAR ADC with adaptive conversion time detection-and-control for high immunity to PVT variations

A 0.5 V 8-12 bit 300 KSPS SAR ADC with adaptive conversion time detection-and-control for high immunity to PVT variations

In this paper, a low power asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) involving the process, voltage, and temperature (PVT) compensation is presented. A proposed adaptive conversion time detection-and-control technique enhances the power efficiency, coveri...

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書目詳細資料
Main Authors:	Kim, Ju Eon, Yoo, Taegeun, Jung, Dong-Kyu, Yoon, Dong-Hyun, Seong, Kiho, Kim, Tony Tae-Hyoung, Baek, Kwang-Hyun
其他作者:	School of Electrical and Electronic Engineering
格式:	Article
語言:	English
出版:	2021
主題:	Engineering::Electrical and electronic engineering Asynchronous Compensation
在線閱讀:	https://hdl.handle.net/10356/145808
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!
機構:	Nanyang Technological University
語言:	English

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