Process capability index (CPK) improvement for NMOS transistor IDSAT of 0.3 micrometer technology

Process capability index (CPK) improvement for NMOS transistor IDSAT of 0.3 micrometer technology

NLDD layer is normally considered as non-critical masking layer for 0.3?m technology. Nonetheless, it is a layer of interest in this study. This layer was first brought to attention due to wafers failing low of Idast of NMOS transistor and the problem was attributed to the marginality seen at this l...

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Main Author: Goh, Beng Lee.
Other Authors: Prasad, Krishnamachar
Format: Theses and Dissertations
Published: 2008
Subjects:
DRNTU::Engineering::Electrical and electronic engineering::Microelectronics
Online Access:http://hdl.handle.net/10356/4292
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Institution: Nanyang Technological University
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spelling sg-ntu-dr.10356-42922023-07-04T15:52:39Z Process capability index (CPK) improvement for NMOS transistor IDSAT of 0.3 micrometer technology Goh, Beng Lee. Prasad, Krishnamachar School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Microelectronics NLDD layer is normally considered as non-critical masking layer for 0.3?m technology. Nonetheless, it is a layer of interest in this study. This layer was first brought to attention due to wafers failing low of Idast of NMOS transistor and the problem was attributed to the marginality seen at this layer. Master of Science (Microelectronics) 2008-09-17T09:48:39Z 2008-09-17T09:48:39Z 2003 2003 Thesis http://hdl.handle.net/10356/4292 Nanyang Technological University application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
topic DRNTU::Engineering::Electrical and electronic engineering::Microelectronics
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Microelectronics
Goh, Beng Lee.
Process capability index (CPK) improvement for NMOS transistor IDSAT of 0.3 micrometer technology
description NLDD layer is normally considered as non-critical masking layer for 0.3?m technology. Nonetheless, it is a layer of interest in this study. This layer was first brought to attention due to wafers failing low of Idast of NMOS transistor and the problem was attributed to the marginality seen at this layer.
author2 Prasad, Krishnamachar
author_facet Prasad, Krishnamachar
Goh, Beng Lee.
format Theses and Dissertations
author Goh, Beng Lee.
author_sort Goh, Beng Lee.
title Process capability index (CPK) improvement for NMOS transistor IDSAT of 0.3 micrometer technology
title_short Process capability index (CPK) improvement for NMOS transistor IDSAT of 0.3 micrometer technology
title_full Process capability index (CPK) improvement for NMOS transistor IDSAT of 0.3 micrometer technology
title_fullStr Process capability index (CPK) improvement for NMOS transistor IDSAT of 0.3 micrometer technology
title_full_unstemmed Process capability index (CPK) improvement for NMOS transistor IDSAT of 0.3 micrometer technology
title_sort process capability index (cpk) improvement for nmos transistor idsat of 0.3 micrometer technology
publishDate 2008
url http://hdl.handle.net/10356/4292
_version_ 1772825772859326464

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