A reconfigurable FPGA implementation of an LDPC decoder for unstructured codes

A reconfigurable FPGA implementation of an LDPC decoder for unstructured codes

This paper describes the implementation of a general and embedded decoder for the evaluation of unstructured...

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書目詳細資料
Main Authors:	Hosseini, S. M. Ehsan, Chan, Kheong Sann, Goh, Wang Ling
其他作者:	School of Electrical and Electronic Engineering
格式:	Conference or Workshop Item
語言:	English
出版:	2010
主題:	DRNTU::Engineering::Electrical and electronic engineering::Electronic systems
在線閱讀:	https://hdl.handle.net/10356/99867 http://hdl.handle.net/10220/6373
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!

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