Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization

10.1063/1.2748366

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Bibliographic Details
Main Authors: Toh, E.-H., Wang, G.H., Samudra, G., Yeo, Y.-C.
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Article
Published: 2014
Online Access:http://scholarbank.nus.edu.sg/handle/10635/55625
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Institution: National University of Singapore