Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization

10.1063/1.2748366

Saved in:

Bibliographic Details
Main Authors:	Toh, E.-H., Wang, G.H., Samudra, G., Yeo, Y.-C.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Article
Published:	2014
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/55625
Tags:	Add Tag No Tags, Be the first to tag this record!
Institution:	National University of Singapore

id	sg-nus-scholar.10635-55625
record_format	dspace
spelling	sg-nus-scholar.10635-556252023-10-26T20:09:43Z Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization Toh, E.-H. Wang, G.H. Samudra, G. Yeo, Y.-C. ELECTRICAL & COMPUTER ENGINEERING 10.1063/1.2748366 Applied Physics Letters 90 26 - APPLA 2014-06-17T02:45:16Z 2014-06-17T02:45:16Z 2007 Article Toh, E.-H., Wang, G.H., Samudra, G., Yeo, Y.-C. (2007). Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization. Applied Physics Letters 90 (26) : -. ScholarBank@NUS Repository. https://doi.org/10.1063/1.2748366 00036951 http://scholarbank.nus.edu.sg/handle/10635/55625 000247625500087 Scopus
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
description	10.1063/1.2748366
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING Toh, E.-H. Wang, G.H. Samudra, G. Yeo, Y.-C.
format	Article
author	Toh, E.-H. Wang, G.H. Samudra, G. Yeo, Y.-C.
spellingShingle	Toh, E.-H. Wang, G.H. Samudra, G. Yeo, Y.-C. Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization
author_sort	Toh, E.-H.
title	Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization
title_short	Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization
title_full	Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization
title_fullStr	Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization
title_full_unstemmed	Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization
title_sort	device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/55625
_version_	1781412161460895744

Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization

Similar Items