Sub-30 nm FinFETs with schottky-barrier source/drain featuring complementary metal silicides and fully-silicided gate for P-FinFETs

Sub-30 nm FinFETs with schottky-barrier source/drain featuring complementary metal silicides and fully-silicided gate for P-FinFETs

Materials Research Society Symposium Proceedings

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Bibliographic Details
Main Authors: Lee, R.T.P., Tan, K.-M., Liow, T.-Y., Lim, A.E.-J., Lo, G.-Q., Samudra', G.S., Chi, D.-Z., Yeo, Y.-C.
Other Authors: ELECTRICAL & COMPUTER ENGINEERING
Format: Conference or Workshop Item
Published: 2014
Online Access:http://scholarbank.nus.edu.sg/handle/10635/84254
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Institution: National University of Singapore

Internet

http://scholarbank.nus.edu.sg/handle/10635/84254

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