Sub-30 nm FinFETs with schottky-barrier source/drain featuring complementary metal silicides and fully-silicided gate for P-FinFETs

Materials Research Society Symposium Proceedings

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Main Authors:	Lee, R.T.P., Tan, K.-M., Liow, T.-Y., Lim, A.E.-J., Lo, G.-Q., Samudra', G.S., Chi, D.-Z., Yeo, Y.-C.
Other Authors:	ELECTRICAL & COMPUTER ENGINEERING
Format:	Conference or Workshop Item
Published:	2014
Online Access:	http://scholarbank.nus.edu.sg/handle/10635/84254
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Institution:	National University of Singapore

id	sg-nus-scholar.10635-84254
record_format	dspace
spelling	sg-nus-scholar.10635-842542024-11-11T07:46:34Z Sub-30 nm FinFETs with schottky-barrier source/drain featuring complementary metal silicides and fully-silicided gate for P-FinFETs Lee, R.T.P. Tan, K.-M. Liow, T.-Y. Lim, A.E.-J. Lo, G.-Q. Samudra', G.S. Chi, D.-Z. Yeo, Y.-C. ELECTRICAL & COMPUTER ENGINEERING Materials Research Society Symposium Proceedings 995 73-78 MRSPD 2014-10-07T04:50:35Z 2014-10-07T04:50:35Z 2007 Conference Paper Lee, R.T.P.,Tan, K.-M.,Liow, T.-Y.,Lim, A.E.-J.,Lo, G.-Q.,Samudra', G.S.,Chi, D.-Z.,Yeo, Y.-C. (2007). Sub-30 nm FinFETs with schottky-barrier source/drain featuring complementary metal silicides and fully-silicided gate for P-FinFETs. Materials Research Society Symposium Proceedings 995 : 73-78. ScholarBank@NUS Repository. 9781605604275 02729172 http://scholarbank.nus.edu.sg/handle/10635/84254 NOT_IN_WOS Scopus
institution	National University of Singapore
building	NUS Library
continent	Asia
country	Singapore Singapore
content_provider	NUS Library
collection	ScholarBank@NUS
description	Materials Research Society Symposium Proceedings
author2	ELECTRICAL & COMPUTER ENGINEERING
author_facet	ELECTRICAL & COMPUTER ENGINEERING Lee, R.T.P. Tan, K.-M. Liow, T.-Y. Lim, A.E.-J. Lo, G.-Q. Samudra', G.S. Chi, D.-Z. Yeo, Y.-C.
format	Conference or Workshop Item
author	Lee, R.T.P. Tan, K.-M. Liow, T.-Y. Lim, A.E.-J. Lo, G.-Q. Samudra', G.S. Chi, D.-Z. Yeo, Y.-C.
spellingShingle	Lee, R.T.P. Tan, K.-M. Liow, T.-Y. Lim, A.E.-J. Lo, G.-Q. Samudra', G.S. Chi, D.-Z. Yeo, Y.-C. Sub-30 nm FinFETs with schottky-barrier source/drain featuring complementary metal silicides and fully-silicided gate for P-FinFETs
author_sort	Lee, R.T.P.
title	Sub-30 nm FinFETs with schottky-barrier source/drain featuring complementary metal silicides and fully-silicided gate for P-FinFETs
title_short	Sub-30 nm FinFETs with schottky-barrier source/drain featuring complementary metal silicides and fully-silicided gate for P-FinFETs
title_full	Sub-30 nm FinFETs with schottky-barrier source/drain featuring complementary metal silicides and fully-silicided gate for P-FinFETs
title_fullStr	Sub-30 nm FinFETs with schottky-barrier source/drain featuring complementary metal silicides and fully-silicided gate for P-FinFETs
title_full_unstemmed	Sub-30 nm FinFETs with schottky-barrier source/drain featuring complementary metal silicides and fully-silicided gate for P-FinFETs
title_sort	sub-30 nm finfets with schottky-barrier source/drain featuring complementary metal silicides and fully-silicided gate for p-finfets
publishDate	2014
url	http://scholarbank.nus.edu.sg/handle/10635/84254
_version_	1821210819439886336

Sub-30 nm FinFETs with schottky-barrier source/drain featuring complementary metal silicides and fully-silicided gate for P-FinFETs

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