Sub-30 nm FinFETs with schottky-barrier source/drain featuring complementary metal silicides and fully-silicided gate for P-FinFETs

Sub-30 nm FinFETs with schottky-barrier source/drain featuring complementary metal silicides and fully-silicided gate for P-FinFETs

Materials Research Society Symposium Proceedings

محفوظ في:

التفاصيل البيبلوغرافية
المؤلفون الرئيسيون:	Lee, R.T.P., Tan, K.-M., Liow, T.-Y., Lim, A.E.-J., Lo, G.-Q., Samudra', G.S., Chi, D.-Z., Yeo, Y.-C.
مؤلفون آخرون:	ELECTRICAL & COMPUTER ENGINEERING
التنسيق:	Conference or Workshop Item
منشور في:	2014
الوصول للمادة أونلاين:	http://scholarbank.nus.edu.sg/handle/10635/84254
الوسوم:	إضافة وسم لا توجد وسوم, كن أول من يضع وسما على هذه التسجيلة!
المؤسسة:	National University of Singapore

مواد مشابهة

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