Sub-30 nm FinFETs with schottky-barrier source/drain featuring complementary metal silicides and fully-silicided gate for P-FinFETs

• Main Authors: Lee, R.T.P., Tan, K.-M., Liow, T.-Y., Lim, A.E.-J., Lo, G.-Q., Samudra', G.S., Chi, D.-Z., Yeo, Y.-C.
• 其他作者: ELECTRICAL & COMPUTER ENGINEERING
• 格式: Conference or Workshop Item
• 出版: 2014
• 在線閱讀: http://scholarbank.nus.edu.sg/handle/10635/84254

Materials Research Society Symposium Proceedings