14.3 A 43pJ/cycle non-volatile microcontroller with 4.7μs shutdown/wake-up integrating 2.3-bit/cell resistive RAM and resillence techniques
Non-volatility is emerging as an essential on-chip memory characteristic across a wide range of application domains, from edge nodes for the Internet of Things (IoT) to large computing clusters. On-chip non-volatile memory (NVM) is critical for low-energy operation, real-time responses, privacy and...
Saved in:
Main Authors: | Wu, Tony F., Le, Binh Q., Radway, Robert, Bartolo, Andrew, Hwang, William, Jeong, Seungbin, Li, Haitong, Tandon, Pulkit, Vianello, Elisa, Vivet, Pascal, Nowak, Etienne, Wootters, Mary K., Wong, Philip H.-S., Mohamed M. Sabry Aly, Beigne, Edith, Mitra, Subhasish |
---|---|
Other Authors: | School of Computer Science and Engineering |
Format: | Conference or Workshop Item |
Language: | English |
Published: |
2020
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/143358 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Similar Items
-
Performance, power, and reliability tradeoffs of STT-RAM cell subject to architecture-level requirement
by: Li, H., et al.
Published: (2013) -
First principles based investigations of materials for resistive RAM
by: Kishi, Hirofumi, et al.
Published: (2008) -
Resistive RAM endurance : array-level characterization and correction techniques targeting deep learning applications
by: Grossi, Alessandro, et al.
Published: (2020) -
Non-volatile logic-in-memory circuit design
by: Tan, Tai Min
Published: (2024) -
DW-AES: A Domain-Wall Nanowire-Based AES for High Throughput and Energy-Efficient Data Encryption in Non-Volatile Memory
by: Wang, Yuhao, et al.
Published: (2017)