Accelerating sparse matrix operations on FPGAs with on/off-chip memories

Accelerating sparse matrix operations on FPGAs with on/off-chip memories

Sparse matrix operations on FPGAs have gained much attention. Since sparse matrix operations are memory-bounded, the hardware efficiency depends on hardware-aware data organization and dedicated hardware design. On the one side, sparse matrices are stored in the off-chip DDR and are transferred to t...

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書目詳細資料
主要作者:	Li, Shiqing
其他作者:	Weichen Liu
格式:	Thesis-Doctor of Philosophy
語言:	English
出版:	Nanyang Technological University 2023
主題:	Engineering::Computer science and engineering
在線閱讀:	https://hdl.handle.net/10356/172513 https://doi.org/10.21979/N9/ATEYFB https://doi.org/10.21979/N9/EXZ0Y3
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!

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