Low power logic-in-memory circuit design

• Main Author: Loe, Matthew Kit Wai
• Other Authors: Kim Tae Hyoung
• Format: Final Year Project
• Language: English
• Published: Nanyang Technological University 2024
• Subjects: Engineering
• Online Access: https://hdl.handle.net/10356/176851
• Institution: Nanyang Technological University

This paper presents an analysis of power dissipation between conventional 6T SRAM memory arrays and SRAM memory arrays employing power reduction techniques. This study aims to assess the power efficiency of these power reduction techniques, which is crucial for low power applications in modern elect...